1. Field of the Invention
The present invention generally relates to electronic devices and, more specifically, to an analog switch made from a MOS transistor.
2. Discussion of the Related Art
FIG. 1 shows an analog switch 1 described in U.S. Pat. No. 5,933,046 (B2895-ST/95-GR2-084).
This switch is capable of operating in circuits supplied with a low voltage, for example, 3 volts. It comprises a P-channel MOS transistor M1. Drain D1 and source S1 of transistor M1 define input and output terminals U1 and U2 of switch 1. The substrate or bulk B1 is connected, via a constant current source 11, to a power supply terminal Vcc having a positive voltage. Gate G1 of transistor M1 is controlled by a voltage source, not shown. For example, gate G1 receives a logic signal Vg having two levels defining the on and off states of transistor M1.
For the analog switch to have a maximum voltage swing, the highest one of the voltages of terminals U1 and U2 is desired to be applied to the terminal of substrate B1. It being an analog switch, output terminal U2 is indeed likely to have a voltage which is sometimes greater, sometimes smaller than the voltage of input terminal U1 according to the direction in which the input voltage varies.
Transistors M2 and M3 are assembled symmetrically with respect to analog switch 1. Their respective gates G2 and G3 are connected to terminals U1 and U2. Their sources S2, S3 are connected to a common node N which is itself grounded via a constant current source 10. Drains D2, D3 of transistors M2 and M3 are connected to power supply terminal Vcc. Finally, a transistor M4 has its gate G4 and its drain D4 connected to substrate terminal B1 of transistor M1 and its source S4 connected to node N. Substrate terminals B2 to B4 of transistors M2 to M4, shown as floating, are generally connected to ground GND.
The operation of such an analog switch 1 is the following. Node N is brought to the highest one of the voltages of terminals U1 and U2, minus a threshold voltage (that of the associated transistor M2 or M3). For example, if the voltage of terminal U1 is greater than the voltage of terminal U2, transistor M2 behaves as a follower transistor and transfers the voltage of terminal U1 minus the threshold voltage of transistor M2 onto node N. As a result, on the one hand, transistor M3 is turned off (since its gate-source voltage becomes positive) and, on the other hand, substrate B1 has a voltage equal to the voltage of node N plus the threshold voltage of transistor M4. Since the threshold voltages of transistors M2 to M4 are almost equal, substrate B1 has a voltage substantially equal to the voltage of terminal U1. In this configuration, everything happens as if terminal B1 and source S1 of transistor M1 were directly connected, which thus minimizes the threshold voltage of transistor M1.
When terminals U1 and U2 both have a voltage smaller than the threshold voltage of transistors M2 and M3, the transistors turn off. Voltage Vb of substrate terminal B1 then has a minimum value equal to the threshold voltage of transistor M4. This results in an increase in the value of the threshold voltage of transistor M1, which generates a distortion of the signal copied on terminal U2. The linearity of the analog switch is altered for low-amplitude signals.
Further, the switch operation requires an external voltage source to apply a control voltage Vg on gate G1. This makes the configuration of this switch relatively complex.
US Patent Application 2003/0016072 discloses an analog switch comprising a main MOS transistor connecting input and output terminals, and two MOS transistors series-assembled between the input and output terminals, the midpoint of the series assembly being connected to the substrate of the main transistor and the gates of the three transistors being interconnected.
EP-A-0720270, FR-A-2509931 and WO-A-2007/051178 disclose other analog switch circuits.